1. Field of the Invention
This invention provides a means of narrowing the threshold distribution during the erasing of information in a flash EEPROM composed of memory cells of two-layer polysilicon structure.
2. Description of the Related Art
In conventional flash EEPROMs having an array structure as shown in FIG. 1, the erasing of information is achieved by extracting electrons from, for example, the floating gate to the source through Fowler-Nordheim (hereinafter, referred to as F-N) tunneling. By applying a positive potential to the source and a negative potential to the word line, the erasing is done for all the memory cells, or in blocks of memory cells, or word line by word line.
In an EEPROM as shown in FIG. 1, however, for example, two word lines W1 and W2 are arranged so as to make a pair with a source line S1 between them. Consequently, the threshold distributions of the two word lines W1 and W2 are independent of each other as shown in FIG. 2.
The difference in the threshold distribution between the two word lines W1 and W2 is ascribed to a combination of factors such as the misaligned stepper and the anisotropic processes (especially, such as ion implantation and etching). It is very difficult to eliminate the difference completely.
In that case, when all the memory cells are erased in unison or the memory cells are erased in blocks, variations in the threshold value spread in the range shown by a (broken line) in FIG. 2. As a result, the threshold distribution b of word line W1 overlaps with the threshold distribution c of word line W2.
In contrast, it is also possible to erase information word line by word line. In that case, because erasing is achieved for each word line, a range which covers all variations in the threshold value is equal to a range for a single word line (a single-dot chain line Y) as shown by e in FIG. 2. In this erasing method, however, since information is erased word line by word line, as many erasing actions as there are word lines are required. Consequently, it takes a very long time to complete the erasing operation.
As mentioned above, in conventional EEPROMs where two word lines are arranged so as to make a pair with a source line between them, because there is a difference in the threshold distribution between the two word lines during an erasing operation, when all the memory cells are erased simulaneously or memory cells are erased in blocks, this causes the disadvantage that the threshold distribution becomes wider.